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ltm8027 1 8027fb typical a pplica t ion fea t ures a pplica t ions descrip t ion 60v, 4a dc/dc module regulator the ltm ? 8027 is a complete 4a, dc/dc step-down power supply. included in the package are the switching control - ler, power switches, inductor and all support components. operating over an input voltage range of 4.5v to 60v (7.5v minimum voltage to start), the ltm8027 supports output voltages up to 24v, and a switching frequency range of 100khz to 500khz, each set by a single resistor. only the bulk input and output filter capacitors are needed to finish the design. the low profile package (4.32mm) enables utilization of unused space on the bottom of pc boards for high den- sity point of load regulation. a built-in soft-start timer is adjustable with a small capacitor. the ltm8027 is packaged in a thermally enhanced, compact (15mm 15mm) and low profile (4.32mm) over-molded land grid array (lga) package suitable for automated assembly by standard surface mount equipment. the ltm8027 is pb-free and rohs compliant. l , lt, ltc, ltm, linear technology, the linear logo and module are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 48w, 16v in to 60v in dc/dc module ? regulator n complete switch mode power supply n wide input voltage range: 4.5v to 60v (7.5v minimum v oltage to start) n wide output voltage range: 2.5v to 24v (see t able 2) n 4a output current n programmable soft-start n 9a shutdown supply current n selectable switching frequency current mode control n up to 95% efficiency n pb-free (e4) rohs compliant package with gold pad finish n tiny, low profile (15mm 15mm 4.32mm) sur face mount lga package n 12v and 42v automotive and heavy equipment n 48v telecom power supplies n avionics and industrial control systems n distributed power converters efficiency vs load load (a) 0 0 efficiency (%) 10 30 40 50 100 24v in 70 1 2 8027 ta01b 20 80 90 60 3 4 v in run ss sync rt adj v out gnd 3845 ta01a ltm8027 v in 16v to 60v v out 12v 4a 48.7k 1m 56.2k 4.7f 2 22f 4 bias1 bias2 aux
ltm8027 2 8027fb a bsolu t e maxi m u m r a t ings v in voltage ................................................................ 6 5v bias1 ........................................................................ 15v b ias2 ........................................................................ 24 v sync, adj, r t , run, ss voltages .............................. 5v cu rrent into run pin (note 2) .................................. 1m a v out , aux ................................................................. 2 5v current out of aux ............................................. 20 0ma internal operating temperature (note 3) e- , i-grade ......................................... C 40c to 125c m p-grade .......................................... C 55c to 125c maximum soldering temperature ......................... 24 5c storage temperature range .................. C 55c to 125c (note 1) o r d er i n f or m a t ion lead free finish tray part marking package description temperature range (note 3) ltm8027ev#pbf ltm8027ev#pbf ltm8027v 113-lead (15mm 15mm 4.32mm) lga C40c to 125c ltm8027iv#pbf ltm8027iv#pbf ltm8027v 113-lead (15mm 15mm 4.32mm) lga C40c to 125c ltm8027mpv#pbf ltm8027mpv#pbf ltm8027v 113-lead (15mm 15mm 4.32mm) lga C55c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/ p in c on f igura t ion lga package 113-lead (15mm 15mm 4.32mm) top view rt a 1 2 3 4 5 6 7 8 9 10 11 b c d e f g h j k l sync adj aux v out bank 1 gnd bank 2 v in bank 3 bias1 ss run bias2 t jmax = 125c, ja = 12.2c/w, jc(top) = 9.3c/w, jc(bottom) = 3.6c/w, jboard = 7.54c/w values determined per jesd 51-9 weight = 2.6 grams e lec t rical c harac t eris t ics symbol parameter conditions min typ max units v in input dc voltage (note 5) l 4.5 60 v v out maximum output dc voltage 0a < i out 4a, v in = 48v 24 v i out output dc current v in 60v, v out = 12v, (note 4) 0 4 a v in(start) minimum start voltage 7.5 v ?v out /?v in line regulation v out = 12v, 15v< v in < 60v, i load = 4a 0.2 % ?v out /?i load load regulation v out = 12v, v in = 24v, 0a < i load 4a 0.2 % v uvlo(rising) input undervoltage lockout threshold (rising) (note 5) 4.6 v v uvlo(falling) input undervoltage lockout threshold (falling) (note 5) 3.7 v the l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at t a = 25c. v in = 20v, bias1 = bias2 = 10v, run = 2v, unless otherwise noted.
ltm8027 3 8027fb e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the run pin is internally clamped to 5v. note 3: the ltm8027e is guaranteed to meet performance specifications from 0c to 125c internal operating temperature. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltm8027i is guaranteed to meet specifications over the full symbol parameter conditions min typ max units v adj adj voltage l 1.224 1.215 1.238 1.245 v v i q(vin) quiescent current into in v bias = v aux , v out = 12vdc, no load v run = 0v 39 9 ma a v bias1 bias1 undervoltage lockout (rising) bias1 undervoltage lockout (falling) 6.5 6 v v i bias1 current into bias1 no load run = 0v 25 25 ma a v bias2 minimum bias2 voltage 3 v i bias2 current into bias2 1 a v bias1(minov) minimum voltage to overdrive internal regulator (intv cc ) 8.5 v r fb internal feedback resistor 499 k v run(rising) run enable voltage (rising) 1.4 v v run(falling) run enable voltage (falling) 1.2 v f sw switching frequency r t = 187k r t = 23.7k 100 500 khz khz r sync sync input resistance 40 k v sync(th) sync voltage threshold f sync = 350khz l 2.3 v i ss soft-start charging current 2 a the l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at t a = 25c. v in = 20v, bias1 = bias2 = 10v, run = 2v, unless otherwise noted. C40c to 125c internal operating temperature range. the ltm8027mp is guaranteed to meet specifications over the full C55c to 125c internal operating range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 4: the maximum continuous output current may be derated by the ltm8027 junction temperature. note 5: v in voltages below the start-up threshold (7.5v) are only supported when bias1 is externally driven above 6.5v.
ltm8027 4 8027fb typical p er f or m ance c harac t eris t ics efficiency vs load, v out = 2.5v efficiency vs load, v out = 8v load (a) 0 0 efficiency (%) 10 30 40 50 100 70 1 2 8027 g01 20 80 90 60 3 4 5v in 12v in 24v in 36v in efficiency vs load, v out = 3.3v load (a) 0 0 efficiency (%) 10 30 40 50 100 70 1 2 8027 g02 20 80 90 60 3 4 5v in 12v in 24v in 36v in 48v in 60v in efficiency vs load, v out = 5v load (a) 0 0 efficiency (%) 10 30 40 50 100 70 1 2 8027 g03 20 80 90 60 3 4 12v in 24v in 36v in 48v in 60v in load (a) 0 0 efficiency (%) 10 30 40 50 100 70 1 2 8027 g04 20 80 90 60 3 4 12v in 24v in 36v in 48v in 60v in efficiency vs load, v out = 12v load (a) 0 0 efficiency (%) 10 30 40 50 100 70 1 2 8027 g05 20 80 90 60 3 4 24v in 36v in 48v in 60v in efficiency vs load, v out = 15v load (a) 0 0 efficiency (%) 10 30 40 50 100 70 1 2 8027 g06 20 80 90 60 3 4 24v in 36v in 48v in 60v in efficiency vs load, v out = 18v load (a) 0 0 efficiency (%) 10 30 40 50 100 70 1 2 8027 g07 20 80 90 60 3 4 24v in 36v in 48v in 60v in efficiency vs load, v out = 24v load (a) 0 0 efficiency (%) 10 30 40 50 100 70 1 2 8027 g08 20 80 90 60 3 4 36v in 48v in 60v in input current vs v in output shorted (t a = 25c unless otherwise noted) input voltage (v) 0 input current (a) 0.8 1.0 1.2 30 50 8027 g09 0.6 0.4 10 20 40 60 70 0.2 0
ltm8027 5 8027fb input current vs load, v out = 2.5v input current vs load, v out = 3.3v input current vs load, v out = 5v input current vs load, v out = 8v input current vs load, v out = 12v input current vs load, v out = 15v input current vs load, v out = 18v input current vs load, v out = 24v bias current vs load, v out = 2.5v typical p er f or m ance c harac t eris t ics (t a = 25c unless otherwise noted) load (a) 0 0 input current (ma) 500 1000 1500 2000 2500 3000 1 2 3 4 8027 g10 5v in 12v in 24v in 36v in load (a) 0 2000 2500 3500 3 8027 g11 1500 1000 1 2 4 500 0 3000 input current (ma) 5v in 12v in 24v in 36v in 48v in 60v in load (a) 0 0 input current (ma) 200 600 800 1000 2000 1400 1 2 8027 g12 400 1600 1800 1200 3 4 12v in 24v in 36v in 48v in 60v in load (a) 0 2000 2500 3500 3 8027 g13 1500 1000 1 2 4 500 0 3000 input current (ma) 12v in 24v in 36v in 48v in 60v in load (a) 0 input current (ma) 1000 1500 4 8027 g14 500 0 1 2 3 2500 2000 24v in 36v in 48v in 60v in load (a) 0 0 input current (ma) 500 1000 1500 2000 2500 3000 1 2 3 4 8027 g15 24v in 36v in 48v in 60v in load (a) 0 0 input current (ma) 500 1000 1500 2000 2500 3500 3000 1 2 3 4 8027 g16 24v in 36v in 48v in 60v in load (a) 0 0 input current (ma) 500 1000 1500 2000 2500 3500 3000 1 2 3 4 8027 g17 36v in 48v in 60v in load (a) 0 bias current (ma) 14.00 14.50 4 8027 g18 13.50 13.00 12.00 1 2 3 12.50 15.50 15.00 36v in 24v in 12v in
ltm8027 6 8027fb bias current vs load, v out = 3.3v bias current vs load, v out = 5v bias current vs load, v out = 8v bias current vs load, v out = 12v bias current vs load, v out = 15v bias current vs load, v out = 18v bias current vs load, v out = 24v minimum v in vs load, v out = 5v minimum v in vs load, v out = 8v typical p er f or m ance c harac t eris t ics (t a = 25c unless otherwise noted) load (a) 0 bias current (ma) 14.5 15.0 15.5 18.0 16.5 1 2 8027 g19 14.0 17.0 17.5 16.0 3 4 48v in 36v in 24v in 12v in load (a) 0 bias current (ma) 14.5 15.0 4 8027 g20 14.0 13.0 1 2 3 13.5 16.0 15.5 48v in 36v in 24v in 12v in load (a) 0 bias current (ma) 24.5 25.0 4 8027 g21 24.0 23.5 23.0 22.5 22.0 1 2 3 26.0 25.5 48v in 36v in 24v in load (a) 0 bias current (ma) 27.0 27.5 28.5 28.0 4 8027 g22 26.5 26.0 25.0 1 2 3 25.5 29.5 29.0 48v in 36v in 24v in load (a) 0 bias current (ma) 35 36 4 8027 g23 34 33 32 31 30 1 2 3 38 37 48v in 36v in 24v in load (a) 0 35 bias current (ma) 36 38 39 40 45 42 1 2 8027 g24 37 43 44 41 3 4 48v in 36v in load (a) 0 bias current (ma) 40 42 4 8027 g25 38 36 32 1 2 3 34 46 44 48v in 36v in load (a) 0 5.0 v in (v) 5.1 5.3 5.4 5.5 6.0 5.7 1 2 8027 g26 5.2 5.8 5.9 5.6 3 4 load (a) 0 8.0 v in (v) 8.2 8.6 8.8 9.0 10.0 9.4 1 2 8027 g27 8.4 9.6 9.8 9.2 3 4
ltm8027 7 8027fb minimum v in vs load, v out = 12v minimum v in vs load, v out = 15v minimum v in vs load, v out = 18v minimum v in vs load, v out = 24v minimum v in vs v out , i out = 4a minimum v in vs load, v out = C3.3v minimum v in vs load, v out = C5v minimum v in vs load, v out = C8v minimum v in vs load, v out = C12v typical p er f or m ance c harac t eris t ics (t a = 25c unless otherwise noted) load (a) 0 v in (v) 14.0 14.5 15.0 4 8027 g28 13.5 13.0 12.0 1 2 3 12.5 16.0 15.5 load (a) 0 v in (v) 17.0 17.5 18.0 4 8027 g29 16.5 16.0 15.0 1 2 3 15.5 19.0 18.5 load (a) 0 18 v in (v) 19 20 21 22 23 24 1 2 3 4 8027 g30 load (a) 0 26 28 32 3 8027 g31 24 22 1 2 4 20 18 30 v in (v) v out (v) 0 25 30 35 20 8027 g32 20 15 5 10 15 25 10 5 0 v in (v) load (a) 0 v in (v) 5 6 7 4 8027 g33 4 3 0 1 1 2 3 2 9 8 load (a) 0 0 v in (v) 2 4 6 8 10 12 1 2 3 4 8027 g34 load (a) 0 0 v in (v) 5 10 15 20 25 30 1 2 3 4 8027 g35 load (a) 0 0 v in (v) 5 15 20 25 50 35 1 2 8027 g36 10 40 45 30 3 4
ltm8027 8 8027fb temperature rise vs load, v out = 2.5v temperature rise vs load, v out = 3.3v temperature rise vs load, v out = 5v temperature rise vs load, v out = 8v temperature rise vs load, v out = 12v temperature rise vs load, v out = 15v temperature rise vs load, v out = 18v temperature rise vs load, v out = 24v typical p er f or m ance c harac t eris t ics (t a = 25c unless otherwise noted) load (a) 0 temperature rise (c) 22 27 32 4 8027 g37 17 12 2 1 2 3 7 42 37 36v in 24v in 12v in 5v in load (a) 0 temperature rise (c) 25 30 35 4 8027 g38 20 15 0 1 2 3 5 10 45 40 60v in 48v in 36v in 24v in 12v in 5v in load (a) 0 0 temperature rise (c) 5 15 20 25 50 35 1 2 8027 g39 10 40 45 30 3 4 60v in 48v in 36v in 24v in 12v in load (a) 0 40 50 70 3 8027 g40 30 20 1 2 4 10 0 60 temperature rise (c) 60v in 48v in 36v in 24v in 12v in load (a) 0 temperature rise (c) 40 50 60 4 8027 g41 30 20 0 1 2 3 10 80 70 60v in 48v in 36v in 24v in 16v in load (a) 0 temperature rise (c) 50 60 70 4 8027 g42 40 30 0 1 2 3 10 20 90 80 60v in 48v in 36v in 24v in 20.5v in load (a) 0 0 temperature rise (c) 10 30 40 50 100 70 1 2 8027 g43 20 80 90 60 3 4 60v in 48v in 36v in 26v in load (a) 0 0 temperature rise (c) 10 30 40 50 100 70 1 2 8027 g44 20 80 90 60 3 4 60v in 48v in 36v in
ltm8027 9 8027fb p in func t ions v in (bank 3): the v in pins supply current to the ltm8027s internal regulator and to the internal power switch. these pins must be locally bypassed with an external, low esr capacitor (see table 2). v out (bank 1): power output pins. apply the output filter capacitor and the output load between these and the gnd pins. aux (pin a7): low current voltage source for bias1 and bias2. in many designs, the bias pin is connected to v out by way of the aux pin. the aux pin is internally connected to v out and is placed near the bias pins to ease printed circuit board routing. although this pin is internally connected to v out , do not connect this pin to the load. if this pin is not tied to bias1 and bias2, leave it floating. bias1 (pin a6): the bias1 pin connects to the internal power bus. connect to a power source greater than 8.5v. if the output is greater than 8.5v, connect it to this pin. if the output voltage is less, connect this to a voltage source between 8.5v and 15v. bias2 (pin a3): internal biasing power. connect to aux (if 24v or less) or a voltage source above 3v. do not leave bias2 floating. run (pin a4): tie the run pin to ground to shut down the ltm8027. tie to 1.4v or more for normal operation. the run pin is internally clamped to 5v, so when it is pulled up, be sure to use a pull-up resistor that limits the cur - rent in to the run pin to less than 1ma. if the shutdown feature is not used, tie this pin to the v in pin through a pull-up resistor. gnd (bank 2): tie these gnd pins to a local ground plane below the ltm8027 and the circuit components. rt (pin b1): the rt pin is used to program the switching frequency of the ltm8027 by connecting a resistor from this pin to ground. the applications information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. minimize capacitance at this pin. sync (pin c1): the sync pin provides an external clock input for synchronization of the internal oscillator. the r t resistor should be set such that the internal oscillator fre- quency is 10% to 25% below the external clock frequency. this external clock frequency must be between 100khz and 500khz. if unused, the sync pin is connected to gnd. for more information see oscillator sync in the application information section of this data sheet. adj (pin a2): the ltm8027 regulates its adj pin to 1.23v. connect the adjust resistor from this pin to ground. the value of r adj is given by the equation: r adj = 613.77/(v out C 1.23) where r adj is in k. ss (pin a5): the soft-start pin is used to program the supply soft-start function. use the following formula to calculate c ss for a given output voltage slew rate: c ss = 2a(t ss /1.231v) the pin should be left unconnected when not using the soft-start function.
ltm8027 10 8027fb b lock diagra m o pera t ion the ltm8027 is a standalone nonisolated step-down switching dc/dc power supply with an input voltage range of 4.5v to 60v that can deliver up to 4a of output current. this module provides a precisely regulated output voltage up to 24v, programmable via one external resistor. given that the ltm8027 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. a simplified block diagram is given above. the ltm8027 contains a current mode controller, power switching element, power induc - tor, power mosfets and a modest amount of input and output capacitance. the ltm8027 is a fixed frequency pwm regulator. the switching frequency is set by simply connecting the ap- propriate resistor from the rt pin to gnd. a linear regulator provides internal power (shown as intv cc on the block diagram) to the control circuitry. the bias regulator normally draws power from the v in pin, but if the bias1 pin is connected to an external volt- age higher than 8.5v, bias power will be drawn from the external source (typically the regulated output voltage). this improves efficiency. the run pin is used to enable or place the ltm8027 in shutdown, disconnecting the output and reducing the input current to less than 9a. 8027 bd v in v in intv cc 6.8h run 2.2f current mode controller internal connection to v out ss sync aux bias1 bias2 gnd r t adj v out internal linear regulator 4.7pf 499k
ltm8027 11 8027fb for most applications, the design process is straight forward, summarized as follows: 1. look at table 2 and find the row that has the desired input range and output voltage. 2 . apply the recommended c in , c out , r adj and r t values. 3. connect the bias pins as indicated. while these component and connection combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended system s line, load and environmental conditions. capacitor selection considerations the c in and c out capacitor values in table 2 are the minimum recommended values for the associated oper - ating conditions. applying capacitor values below those indicated in table 2 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. again, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and ap- plied voltage and give dependable service. other types, including y5v and z5u have very large temperature and voltage coefficients of capacitance. in an application cir - cuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the ltm8027. a ceramic input capacitor combined with trace or cable inductance forms a high q (under damped) tank circuit. if the ltm8027 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi- bly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safely section. input power requirements the ltm8027 is biased using an internal linear regulator to generate operational voltages from the v in pin. virtually all of the circuitry in the ltm8027 is biased via this internal linear regulator output (intv cc on the block diagram). this pin is internally decoupled with a low esr capacitor to gnd. the intv cc regulator generates an 8v output provided there is ample voltage on the v in pin. the intv cc regulator has approximately 1v of dropout, and will follow the v in pin with voltages below the dropout threshold. the ltm8027 has a typical start-up requirement of v in > 7.5v. this assures that the onboard regulator has ample headroom to bring the internal regulator (intv cc ) above its uvlo threshold. the intv cc regulator can only source current, so forcing the bias1 pin above 8.5v allows use of externally derived power for the ic. this effectively shuts down the internal linear regulator and reduces power dissipation within the ltm8027. using the onboard regulator for start-up, then applying power to bias1 from the converter output or external supply maximizes con- version efficiencies and is a common practice. if ibias1 is maintained above 6.5v using an external source, the ltm8027 can continue to operate with v in as low as 4.5v. bias power the internal circuitry of the ltm8027 is powered by the intv cc bus, which is derived either from the afore men- tioned internal linear regulator or the bias1 pin, if it is greater than 8.5v. since the internal linear regulator is by nature dissipative, deriving intv cc from an external source through the bias pins reduces the power lost within the ltm8027 and can increase overall system efficiency. a pplica t ions i n f or m a t ion
ltm8027 12 8027fb for example, suppose the ltm8027 needs to provide 5v from an input voltage source that is nominally 12v. from table 2, the recommended r t value is 162k, which cor - responds to an operating frequency of 210khz. from the graphs in the typical performance characteristics, the typical internal regulator (intv cc ) current at 12v in and 210khz is 15ma. the power dissipated by the internal linear regulator at 12v in is given by the equation: p intvcc = (v in C 8) ? i intvcc or only 60mw. this has a small but probably acceptable effect on the operating temperature of the ltm8027. if the input rises to 60v, however, the power dissipation is a lot higher, over 780mw. this can cause unnecessarily high junction temperatures if the intv cc regulator must dissipate this amount of power for very long. connect bias2 to aux (if 24v or less) or a voltage source above 3v. soft-start the soft-start function controls the slew rate of the power supply output voltage during start-up. a controlled output voltage ramp minimizes output voltage overshoot, reduces inrush current from the v in supply, and facilitates supply sequencing. a capacitor connected from the ss pin to gnd programs the slew rate. the capacitor is charged from an internal 2a current source producing a ramped voltage that overrides the command reference to the controller, resulting in a smooth output voltage ramp. the soft-start circuit is disabled once the ss pin voltage has been charged to 200mv above the internal reference of 1.231v. during a v in uvlo, run event, or undervoltage on internal bias, the ss pin voltage is discharged with a 50a current. therefore, the value of the ss capacitor determines how long one of these events must be in order to completely discharge the soft-start capacitor. in the case of an output overload or short circuit, the ss pin voltage is clamped to a diode drop above the adj pin. once the short has been removed the v adj pin voltage starts to recover. the soft- start circuit takes control of the output voltage slew rate once the v adj pin voltage has exceeded the slowly ramp- ing ss pin voltage, reducing the output voltage overshoot during a short-circuit recovery. the desired soft-start time (t ss ) is programmed via the c ss capacitor as follows: c ss = 2a ? t ss 1.231v the amount of time in which the power supply must be under a v in , internal regulator (intv cc ) or v shdn uvlo fault condition (t fault ) before the ss pin voltage enters its active region is approximated by the following formula: t fault = c ss ? 0.65v 50a operating frequency trade-offs the ltm8027 uses a constant frequency architecture that can be programmed over a 100khz to 500khz range with a single resistor from the rt pin to ground. the nominal voltage on the rt pin is 1v and the current that flows from this pin is used to charge an internal oscillator capacitor. the value of r t for a given operating frequency can be chosen from figure 1 or table 1. a pplica t ions i n f or m a t ion figure 1. timing resistor (r t ) value r t (k) 0 0 frequency (khz) 100 200 600 8027 f01 100 50 150 200 300 400 500
ltm8027 13 8027fb table 1 lists typical resistor values for common operating frequencies. table 1. r t resistor values vs frequency r t (k) f sw (khz) 187 100 118 150 82.5 200 63.4k 250 48.7k 300 40.2k 350 31.6k 400 27.4k 450 23.7k 500 it is recommended that the user apply the r t value given in table 2 for the input and output operating condition. system level or other considerations, however, may neces - sitate another operating frequency. while the ltm8027 is flexible enough to accommodate a wide range of operat- ing frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. a frequency that is too high can damage the ltm8027 if the output is overloaded or short-circuited. a frequency that is too low can result in a final design that has too much output ripple or too large of an output capacitor. the maximum frequency (f max ) at which the ltm8027 should be allowed to switch and the minimum frequency set resistor value that should be used for a given set of input and output operating condition is given in table 2 as r t(min) . there are additional conditions that must be satisfied if the synchronization function is used. please refer to the synchronization section for details. output voltage programming the ltm8027 regulates its adj pin to 1.23v. connect the adjust resistor from this pin to ground. the value of r adj is given by the equation r adj = 613.77/(v out C 1.23), where r adj is in k. run control the ltm8027 run pin uses a reference threshold of 1.4v. this precision threshold allows use of the run pin for both logic-level controlled applications and analog monitor - ing applications such as power supply sequencing. the ltm8027 operational status is primarily controlled by a uvlo circuit on internal power source. when the ltm8027 is enabled via the run pin, only the internal regulator (intv cc ) is enabled. switching remains disabled until the uvlo threshold is achieved at the bias1 pin, when the remainder of the ltm8027 is enabled and switching commences. because the ltm8027 high power converter is a power transfer device, a voltage that is lower than expected on the input supply could require currents that exceed the sourcing capabilities of that supply, causing the system to lock up in an undervoltage state. input supply start- up protection can be achieved by enabling the run pin using a resistive divider from the v in supply to ground. setting the divider output to 1.4v when that supply is at an adequate voltage prevents an ltm8027 converter from drawing large currents until the input supply is able to provide the required power. 200mv of input hysteresis on the run pin allows for about 15% of input supply droop before disabling the converter. input uvlo and run the run pin has a precision voltage threshold with hys- teresis which can be used as an undervoltage lockout threshold (uvlo) for the power supply. undervoltage lockout keeps the ltm8027 in shutdown until the supply input voltage is above a certain voltage programmed by the user. the hysteresis voltage prevents noise from falsely tripping uvlo. resistors are chosen by first selecting r b (refer to figure 2). then: r a = r b ? v in(on) 1.4v ? 1 ? ? ? ? ? ? where v in(on) is the input voltage at which the undervolt - age lockout is disabled and the supply turns on. a pplica t ions i n f or m a t ion
ltm8027 14 8027fb example: select r b = 49.9k, v in(on) = 14.5v (based upon a 15v minimum input voltage) r a = 49.9k ? 14.5v 1.4v ? 1 ? ? ? ? ? ? = 464k the v in turn off voltage is 15% below turn on. in the example the v in(off) would be 12.3v. the shutdown func - tion can be disabled by connecting the run pin to the v in pin through a large value pull-up resistor, (r pu ). this pin contains a low impedance clamp at 6v, so the run pin will sink current from the r pu pull-up resistor: i run = v in ? 6v r pu because this arrangement will clamp the run pin to 6v, it will violate the 5v absolute maximum voltage rating of the pin. this is permitted, however, as long as the absolute maximum input current rating of 1ma is not exceeded. input run pin currents of <100a are recommended: a 1m or greater pull-up resistor is typically used for this configuration. hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of ltm8027. however, these capacitors can cause problems if the ltm8027 is plugged into a live supply (see linear technology application note 88 for a complete discussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an under damped tank circuit, and the volt - age at the v in pin of the ltm8027 can ring to twice the nominal input voltage, possibly exceeding the ltm8027s rating and damaging the part. if the input supply is poorly controlled or the user will be plugging the ltm8027 into an energized supply, the input network should be designed to prevent this overshoot by introducing a damping element into the path of current flow. this is often done by add - ing an inexpensive electrolytic bulk capacitor across the input terminals of the ltm8027. the criteria for selecting this capacitor is that the esr is high enough to damp the ringing, and the capacitance value is several times larger than the ltm8027 ceramic input capacitor. the bulk capacitor does not need to be located physically close to the ltm8027; it should be located close to the application boards input connector, instead. synchronization the oscillator can be synchronized to an external clock. choose the r t resistor such that the resultant frequency is at least 10% below the desired synchronization frequency. it is recommended that the sync pin be driven with a square wave that has amplitude greater than 2.3v, pulse width greater than 1s and rise time less than 500ns. the rising edge of the sync wave form triggers the discharge of the internal oscillator capacitor. pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the ltm8027. the ltm8027 is neverthe - less a switching power supply, and care must be taken to minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 3 for a suggested layout. a pplica t ions i n f or m a t ion figure 2. undervoltage lockout resistive divider run pin r a r b v supply 8027 f02
ltm8027 15 8027fb ensure that the grounding and heat sinking are acceptable. a few rules to keep in mind are: 1. place the r adj and r t resistors as close as possible to their respective pins. 2. place the c in capacitor as close as possible to the v in and gnd connection of the ltm8027. 3. place the c out capacitor as close as possible to the v out and gnd connection of the ltm8027. 4. place the c in and c out capacitors such that their ground current flow directly adjacent to or underneath the ltm8027. 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the ltm8027. use vias to connect the gnd copper area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. pay attention to the location and density of the thermal vias in a pplica t ions i n f or m a t ion v out v in gnd 8027 f03 gnd r t r adj ss run sync aux bias1 bias2 c in c out c out figure 3. suggested layout figure 3. the ltm8027 can benefit from the heat sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling components. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board might use very small via holes. it should employ more thermal vias than a board that uses larger holes. thermal considerations the ltm8027 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the temperature rise curves given in the typical performance character - istics section can be used as a guide. these curves were generated by a ltm8027 mounted to a 58cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental operating conditions.
ltm8027 16 8027fb a pplica t ions i n f or m a t ion the junction-to-air and junction-to-board thermal resis - tances given in the pin configuration diagram may also be used to estimate the ltm8027 internal temperature. these thermal coefficients are determined per jesd 51-9 (jedec standard, test boards for area array surface mount package thermal measurements) through analysis and physical correlation. bear in mind that the actual thermal resistance of the ltm8027 to the printed circuit board depends upon the design of the circuit board. the die temperature of the ltm8027 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the ltm8027. the bulk of the heat flow out of the ltm8027 is through the bottom of the module and the lga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, result - ing in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. table 2. recommended component values and configuration (t a = 25c. see typical performance characteristics for load conditions) v in range (v) v out (v) c in c out bias1 r adj (k) f optimal (khz) r optimal (k) f max (khz) r max (k) 4.5 to 60 3.3 2 4.7f 2220 100v 5 100f 1812 6.3v 8.5v to 15v 301 115 154 160 107 7.5 to 60 5 2 4.7f 2220 100v 4 100f 1210 6.3v 8.5v to 15v 162 210 75.0 230 68.2 10.5 to 60 8 2 4.7f 2220 100v 4 47f 1210 10v 8.5v to 15v 90.9 260 59.0 350 40.2 16 to 60 12 2 4.7f 2220 100v 4 22f 1210 16v aux 56.2 300 48.7 500 23.7 20.5 to 60 15 2 4.7f 2220 100v 4 22f 1210 16v aux 44.2 350 40.2 500 23.7 26 to 60 18 2 4.7f 2220 100v 4 10f 1812 25v 8.5v to 15v 36.5 400 31.6 500 23.7 34 to 60 24 2 4.7f 2220 100v 4 10f 1812 25v 8.5v to 15v 26.7 430 28.7 500 23.7 4.5 to 40 2.5 2 10f 2220 50v 5 100f 1812 6.3v 8.5v to 15v 487 145 124 185 88.7 4.5 to 40 3.3 2 10f 2220 50v 4 100f 1812 6.3v 8.5v to 15v 301 165 102 240 64.9 7.5 to 40 5 2 10f 2220 50v 4 100f 1210 6.3v 8.5v to 15v 162 210 75.0 315 45.3 10.5 to 40 8 2 10f 2220 50v 4 47f 1210 10v 8.5v to 15v 90.9 260 59.0 500 23.7 16 to 40 12 2 10f 2220 50v 4 22f 1210 16v aux 56.2 300 48.7 500 23.7 20.5 to 40 15 1 10f 2220 50v 4 22f 1210 16v aux 44.2 350 40.2 500 23.7 26 to 40 18 1 10f 2220 50v 4 10f 1812 25v 8.5v to 15v 36.5 400 31.6 500 23.7 34 to 40 24 1 10f 2220 50v 4 10f 1812 25v 8.5v to 15v 26.7 430 28.7 500 23.7 4.5 to 56 C3.3 2 4.7f 2220 100v 5 100f 1812 6.3v 8.5v to 15v above output 301 115 154 155 115 4.5 to 55 C5 2 4.7f 2220 100v 4 100f 1210 6.3v 8.5v to 15v above output 162 190 90.9 230 68.2 10.5 to 52 C8 2 4.7f 2220 100v 4 47f 1210 10v 8.5v to 15v above output 90.9 260 59.0 350 40.2 16 to 48 C12 2 4.7f 2220 100v 4 22f 1210 16v aux 56.2 300 48.7 500 23.7
ltm8027 17 8027fb typical a pplica t ions 3.3v v out step-down converter 5v v out step-down converter v in run ss sync rt adj v out gnd 3845 ta02 ltm8027 v in * 4.5v to 40v v out 3.3v 4a 9v 102k 1m 301k *running voltage. see applications information for start-up details 10f 2 100f 4 bias1 bias2 aux v in run ss sync rt adj v out gnd 3845 ta03 ltm8027 v in 7.5v to 60v v out 5v 4a 9v 75k 1m 162k 4.7f 2 100f 4 bias1 bias2 aux
ltm8027 18 8027fb p ackage p ho t ograph 18v v out step-down converter v in run ss sync rt adj v out gnd 3845 ta05 ltm8027 v in 26v to 60v v out 18v 3a 4a surge 9v 31.6k 1m 36.5k 4.7f 2 10f 4 bias1 bias2 aux C12v v out positive-to-negative converter v in run ss sync rt adj v out gnd 3845 ta07 ltm8027 v in 20v to 48v 48.7k 1m 56.2k 4.7f 2 22f 4 schottky diode optional v out ?12v 3a bias1 bias2 aux t ypical a pplica t ions
ltm8027 19 8027fb p ackage descrip t ion lga package 113-lead (15mm 15mm 4.32mm) (reference ltc dwg # 05-08-1756 rev ?) notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222, spp-010 5. primary datum -z- is seating plane 6. the total number of pads: 113 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature symbol aaa bbb eee tolerance 0.15 0.10 0.05 4.22 ? 4.42 detail b detail b substrate mold cap 0.27 ? 0.37 3.95 ? 4.05 // bbb z z 15 bsc package top view 15 bsc 4 pad 1 corner x y aaa z aaa z detail a 12.70 bsc 1.27 bsc 12.70 bsc l k j h g f e d c b package bottom view c(0.30) pad 1 3 pads see notes a 1 2 3 4 5 6 7 8 10 9 11 detail a 0.635 0.025 sq. 113x s yxeee suggested pcb layout top view 0.000 1.270 1.270 2.540 2.540 3.810 3.810 5.080 5.080 6.350 6.350 6.350 6.350 3.810 3.810 5.080 5.080 2.540 2.540 1.270 1.270 0.000 lga 113 0807 rev ? ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin ?a1? please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltm8027 20 8027fb p ackage descrip t ion pin name a1 gnd a2 adj a3 bias2 a4 run a5 ss a6 bias1 a7 aux a8 gnd a9 gnd a10 gnd a11 gnd b1 rt b2 gnd b3 gnd b4 gnd b5 gnd b6 gnd b7 gnd b8 gnd b9 gnd b10 gnd b11 gnd c1 sync c2 gnd c3 gnd c4 gnd c5 gnd c6 gnd c7 gnd c8 gnd c9 gnd c10 gnd c11 gnd d1 gnd d2 gnd d3 gnd d4 gnd d5 gnd pin assignment table (arranged by pin number) pin name d6 gnd d7 gnd d8 gnd d9 gnd d10 gnd d11 gnd e1 gnd e2 gnd e3 gnd e4 gnd e5 gnd e6 gnd e7 gnd e8 gnd e9 v out e10 v out e11 v out f1 gnd f2 gnd f3 gnd f4 gnd f5 gnd f6 gnd f7 gnd f8 gnd f9 v out f10 v out f11 v out g5 gnd g6 gnd g7 gnd g8 gnd g9 v out g10 v out g11 v out h1 v in h2 v in h3 v in pin name h5 gnd h6 gnd h7 gnd h8 gnd h9 v out h10 v out h11 v out j1 v in j2 v in j3 v in j5 gnd j6 gnd j7 gnd j8 gnd j9 v out j10 v out j11 v out k1 v in k2 v in k3 v in k5 gnd k6 gnd k7 gnd k8 gnd k9 v out k10 v out k11 v out l1 v in l2 v in l3 v in l5 gnd l6 gnd l7 gnd l8 gnd l9 v out l10 v out l11 v out
ltm8027 21 8027fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 1/11 changed shutdown current supply to 9a in features. updated absolute maximum ratings section. updated v bias1(minov) and note 3 in electrical characteristics section. replaced graph 9. updated pin functions section. text edits to applications information. updated typical applications. updated related parts. 1 2 3 4 9 11-16 17, 18 22 b 9/11 added (note 3) notation to the order information section. updated minimum spec for v bias2 . updated descriptions for aux and bias2 in the pin functions section. updated text in the input power requirements section. added text to end of the bias power section. 2 3 9 11 12
ltm8027 22 8027fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2009 lt 0911 rev b ? printed in usa r ela t e d p ar t s part number description comments ltm4600 10a dc/dc module regulator 10a dc/dc step-down module regulator, 15mm 15mm 2.8mm lga ltm4600hvmpv military plastic 10a dc/dc module regulator C55c to 125c operation, 15mm 15mm 2.8mm lga ltm4601/ ltm4601a 12a dc/dc module regulator with pll, output tracking/margining and remote sensing synchronizable, polyphase operation, ltm4601-1 version has no remote sensing ltm4602 20v, 6a dc/dc module regulator pin compatible with the ltm4600 ltm4603 6a dc/dc module with pll and output tracking/ margining and remote sensing synchronizable, polyphase operation, ltm4603-1 version has no remote sensing, pin compatible with the ltm4601 ltm4604a 4a low v in dc/dc module regulator 2.375v v in 5v, 0.8v v out 5v, 9mm 15mm 2.3mm lga ltm4608a 8a low v in dc/dc module regulator 2.7v v in 5v, 0.6v v out 5v, 9mm 15mm 2.8mm lga LTM8020 200ma, 36v dc/dc module regulator fixed 450khz frequency, 1.25v v out 5v, 6.25mm 6.25mm 2.32mm lga ltm8022 1a, 36v dc/dc module regulator adjustable frequency, 0.8v v out 5v, 9mm 11.25mm 2.82mm lga, pin compatible to the ltm8023 ltm8023 2a, 36v dc/dc module regulator adjustable frequency, 0.8v v out 5v, 9mm 11.25mm 2.82mm lga, pin compatible to the ltm8022 ltm8025 3a, 36v dc/dc module regulator 0.8v v out 24v, 9mm 15mm 4.32mm lga 15v v out step-down converter v in run ss sync rt adj v out gnd 3845 ta04 ltm8027 v in 20.5v to 60v v out 15v 3.5a 4a surge 40.2k 1m 44.2k 4.7f 2 22f 4 bias1 bias2 aux typical a pplica t ion

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